The second PIC prototype aims to cure the problem of high voltage drop in current loops induced by the industrial optocouplers used in the first full industrial prototype. Although this problem has been resolved, of all the manufacturers, only one offers an industrial optocoupler that meets all PIC specifications, which is unacceptable for a system whose lifespan is expected to exceed 10 years.
Concept
The PIC will be based on the PLC technology with tailor-made electronic interfaces. A master crate housing two Siemens S7-1500 family CPU (CIPM) which are connected to deported I/O slaves through two individual profitNet fieldbus. One CPU is dedicated to the full process while the second one is only dedicated to the beam dump functionality. To be able to interface the power converter (PC) and the quench detection system (QDS) of all circuits in a LHC powering subsector (a cryostat), only two slave crates are necessary: the CIPSA and the CIPSB crates. A power crate (CIPS) to supply all crates with 24 VDC as well as a crate to get all thermal switches from the DFHX and DFHM at LHC point 1 and 5 (HL-LHC) complete the PIC Prototype 2 portfolio.
All crates are designed from a standard 6U, 19" crate from SCHROFF. In particular, the CIPSA and CIPSB house two Siemens ET200MP I/O deported slaves (for redundancy) on the front connected to sliding tailor-made electronic boards on the rear through an electronic backplane and flat cables.
CIPSB slave crate design |
Control Architecture
Interface Boards
There are 4 different sliding electronic cards, namely A, B, C and Ext cards; all complemented by their dedicated faceplate.
Card | Faceplate | Component | Description | EDMS File |
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Card A |
Interface board for: 1xA type circuits 2xB2 type circuits (Common QPS cable) |
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Card B |
Interface board for: 4xB1 type circuits |
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Card C |
Interface board for: 12xC type circuits |
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Card EXT |
Interface board for: 1xAUG 1xUPS 1xCIBU (Maskable) 1xCIBU (Unmaskable) |
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Backplane for slave crate TYPE A | ||||
Backplane for slave crate TYPE B |